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Watchdog reset question.
I’m using the AT91SAM7SE512. The watchdog is running with a time period of two seconds. In the initialisation code I can detect a watchdog reset (together with all the other types).
My question is this:- if a watchdog reset happens is there anyway of knowing where the processor was just before the watchdog kicked in?
Of course, I’ve read the datasheet but there is no mention of a separate register etc. that holds the program counter nor any other information that I can find.
Any thoughts?
Pete
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Thanks you in advance Regards, ardosterMy team is working on developing a prototype of our design that is centered around a JN5148 module. We are now able to program it, and have loaded the most recent ZBPro application template. Most of the time the chip is reset by the watchdog timer 16 seconds after it is turned on. Sometimes when we run it, the watchdog does not expire, however it is kicked only every 14 seconds or so (cutting it close). We cannot see any difference between the times that it sort of works and the times that it doesn't. Does the template expect the user to add a software timer to reset ...Hi, I use STM32F205RCT6 and attached you will find a sample for the STM320G-EVAL. Following problem. I have enabled the watchdog, but the FLASH_EraseSector takes much longer as the watchdog timeout. So I tried to reset the watchdog with the WWDG_IRQHandler. But the interrupt isn't called in this case! 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The sequence: Clear_Watchdog: 'this sub toggles the watchdog into and out of interrupt / reset mode 'this ensures that no matter what mode the watchdog might have been in previously... 'it will be turned off completely CLI 'disable global interrupts WDR 'reset watchdog timer IN R16, MCUSR 'get MCUSR ANDI R16, $F7 'clear the watchdog reset bit in the status reg !OUT MCUSR, R16 'store MCUSR LDS R16, WDTCSR 'get current watchdog setting LDI R17, $58 'load int/res mode value ...Hey guys (and maybe gals), I was wondering if anyone knows whether the watchdog timer always occurs before a reset? (Obviously if the registers are set to do both) on the mega168. The only reason I ask is that I have had some unexpected events although the watchdog ISR hasn't executed, and I can only assume the watchdog ISR was never called as the reset occurred while in an interrupt. Is this correct as I cant find any information stating this in the manual? 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