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The only connection required to download, execute, debug and test assembly language programs on the C8051F120 development board is the 10-pin ribbon cable that connects to the C8051F120 JTAG interface. This also works with C8051F120 chips in my own PCBs.
Now I want to do something a bit different through the JTAG interface, and I’m not sure how. On my PCB an 1MB 8-pin serial flash memory chip is connected to the C8051F120 via the SPI interface. Now I need to program that flash memory with firmware that will eventually be read back by the C8051F120 and written into an FPGA during device initialization.
I’m not sure what is the best way to accomplish this. In fact, I’m not even sure this can be done in any non-gross way.
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#1: extremely gross way
I suppose the worst possible way to program the external flash memory chip is to:
— A: somehow break up the 1MB image of the external flash memory chip into 8 to 17 sections each between 64KB and 128KB.
— B: somehow append each data section onto the end of short assembly language programs as literal DATA (plus the address and number of bytes where the data belongs in the external flash memory).
— C: assemble and download these programs into the C8051F120 flash memory per normal development practice.
— D: after downloading each of these 8 ~ 17 programs (plus 64KB ~ 128KB of data), execute the C8051F120 program — which reads the data from its own flash memory space and programs it into the specified address space in the external flash memory.
Of course, the above must be done 8 ~ 17 times to program the entire 1MB external flash memory chip. Somehow this needs to be automated… I’m not quite sure how.
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#2: the less gross way
Essentially the same as #1 above, except figure out some way to download 8KB of data into the C8051F120 on-chip static RAM memory. I’m not sure whether the existing JTAG interface (and development tools) provides a way to download data into the C8051F120 on-chip static RAM or not. But if such a way exists – this would help avoid trashing the C8051F120 on-chip flash memory due to excessive reprogrammings.
Question: is there any way to set the values of the C8051F120 on-chip static RAM via the JTAG interface?
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#3: one convenient way
If the C8051F120 and/or JTAG interface has any way for the C8051F120 to read data from the JTAG interface (byte by byte), that would be perfecto! Then the C8051F120 program could simply read data from the JTAG interface (into its static RAM temporarily), then program the data into the external flash memory chip.
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#4: less convenient way
If the JTAG interface can write data into [just about any] two C8051F120 registers, then the data could be sent from the development system to the running C8051F120 program byte-by-byte (the second register being toggled back-and-forth between 0×00 and 0xFF to handshake (to assure each byte is read correctly == to make both ends match speed).
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So, my question to more knowledgeable programmers of these chips is…
How can I accomplish what I need – in any of the above ways, or in any other way that I haven’t thought of myself.
PS: I very much don’t want to attempt to hack some kind of gross connection to the PCB to connect to the C8051F120 UART or I2C pins (which are also attached to other gizmos on this PCB).

IP: Logged Scotty
Member posted June 21, 2010 11:59 AM
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Hi bootstrap,
I think AN105 and especially AN117 would be of interest for you.
Using the On-Chip Interface Utilities DLL would not enable you to directly modify port bits(*) and program the serial flash via bitbang, but it should enable you to write a PC application which programs the F120 with a firmware which writes the content of XRAM to the serial flash. Since the DLL enables you to set break points and write to XRAM, the application can update the XRAM each time the breakpoint is reached. After the serial flash is programmed, you can program the normal firmware to the F120.
Regards,
Scotty
(*) I’m not sure because AN117 states that internal RAM could be written to (and therefore the ports, too), but I couldn’t locate any information on how to differentiate between direct and indirect accessed RAM.
[This message has been edited by Scotty (edited June 21, 2010).]