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8051 64K external SRAM possible?
I’m planning to add some external SRAM to my 8051.
I’ve seen many examples how to add 32K but never 64K.
Is it possible to have the full external data space in SRAM?
If so, do I just hardwire the CE line to always select the
chip?Thanks,
Andrew
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I have no love for the products of Solomon or Epson - sorry to anyone reading who works for those companies.want ot interface KM62256C IC (32k SRAM) chip to 8051 using standard external data memory addressing.The doubt is how to connect the control line!. some application notes suggest using 74ls373 while others suggest 74ls374. which one to use? secondly if i use 74ls373, it has two control lines one Output enable(OE) and Latch enable(LE). which line to be connected to ALE ??. If LE is connected then if i continuosly enable the chip, (OE is always low), will it work? Can I use 74ls374(or 574) instead of 373. If yes, please confirm the above control line connections. thank you.Here is the problem. Code is located in 0x1000_0000 (Chip select 0), it is an external flash. The program can boot off there and run. I need to be able to write to the flash. I tried appending the keyword "__ramfunc" and it just jumps to the area 0x4 (Not sure what error that is). I am a computer scientist, with no formal computer engineering training. And i am the sole person working on this project. So i am a bit out of my league. I have a flash driver written, and i am able to get the Manufacturer ID and Device ...Hi guys! I have one (maybe stupid) question. Is it possible to connect to atmega 128 external 128kb sram memory? Can I use not all address lines(in that case I could address only 60k but still use 128k sram module)? Problem is that it's quite hard to find (I couldn't find) in Lithuania 3,3V external SRAM chips and the only one I have is 128kHi, We are trying to re-design an application that uses old H8 and we want to consider Xmega. Existing device has flash and SRAM connected on 16 bit address line and 8 bit data line. I would like to know if this is possible with Xmega device. I only see an example in the datasheet about connecting SRAM on the DMA. Unfortunately I haven't used DMA/Bus architecture before and not clear exactly how it works. Is it possible to connect external flash on the bus along with external RAM. Also can some body help me if it is possible to ...I'm trying to understand what my options are when it comes to interfacing memory to 8051. Am I correct that: - interfacing DRAM is complex (for a beginner) - interfacing SRAM is more straightforward and is really the only practical memory type for fast, random access at the byte level (e.g. stack, heap) - interfacing FlashRAM is also straightforward but writing is more complex than just moving a byte to an address - various forms of serial memory use lowest count of I/O pins but are really,really slow. So, as a novice, do I have any options other than SRAM if I want a large external heap and stack? Also, how does the SRAM ...I am testing a board that has external SRAM. Apparently the SRAM is relatively sensitive to the soldering heat from the manufacturing process, and so careful testing must be done to check integrity of SRAM for newly manufactured boards. What is the best (bare-metal) way to test SRAM? I have a driver that initialises the SRAM for read/write access. My first thought is to run tests such as: 1) Set all bits in SRAM to 1, and check that the SRAM was properly written. 2) Write the digits of Pi in SRAM, and check that the write was done properly. ...Hi, A install a extra sram AS7C34096 into the RCM5700 board. The external ram works fine. It can store data, or running code in it. The external sram uses CS1 OE1. I am sure the external sram is OK, if I force the CS_RAM to CS1 OE1 WE1 for "store program in flash", MB2CR is 0xC5 which mean it point to the external sram. But if I change BOARDTYPES.LIB: #if _BOARD_TYPE_ == RCM5700 //the RCM5700 has only 128k of internal RAM available #ifdef _RAM_ #if __SEPARATE_INST_DATA__ #error "The RCM5700 does not support compiling to" #error " RAM when Separate IampD space is enabled." #fatal " Turn off Separate IampD or compile to ...Hello: How to setup the Bootloader and JTAG to run from the external FLASH/SRAM board? Do you have setup demo that download app image into external FLASH (x8 by 1Mbit) and using SRAM (x8 - 8Mbit)? ---------------- Short descriptions ----------------- I have the application that is getting larger. I need to download the app image into the external FLASH (external board), and run from external flash. I am looking at the TI forum, and see some people have success running their application from the external flash/sram board. If so, can you please give me some technical notes that ...Hi, I would like to store data in a 16kByte SRAM. When the memory of the SRAM has for example reached 10kByte it must send it to a FLASH sd- memorycard of 1GB. Meanwhile the SRAM is still storing new data in the SRAM cells. Does someone knows if reading and writing simultaneously in SRAM is possible ? And is there a maximum write/erase cycle for SRAM? (not mentionned in ATmega datasheet) Thank you !I'm currently working with an ATMega644, and find that I need more data memory than the 4K SRAM available on the chip. Does the chip have any provision for expanding the internal memory with external SRAM, or would I have to start from scratch? Thanks.Hi All I have STM32 bord connectd with 250K extrnal sram The SRAM interface is fully debuged using FSMC function access using IAR compiler (works when system run) How do I set up the IAR and the STM32 firmware to recognize a linear space of all RAM e.g. 252K + 96K(internal)? I have config the IAR ICF file to recognize the SRAM but it is not working. I think the problem lay with the STM32 startup file where the SRAM need to be recognized using a setup of the FSMC Thanks BobiHello everyone! It is good to be back on the forums after taking a break. I have added an external sram chip; 512Kx8 bit cmos sram, product #: AS6C4008. I basically send out 16 bit address data to the sram from my PIC microcontroller and then the sram puts out vga pixel data. I have a 64MHz clock but all instructions take 4 cycles due to pipe lining and so forth so I have instructions executing at 16Mhz. With that in mind I am sending address data to the sram at 16MHz. I have a Hsync of 31.5KHz so I should be ...Is there a way to ".ORG [LOC]" in the data section? In other words I want to: .org 0x1000 a .space 2 ; SRAM variable a b .space 4 ; SRAM variable b c .space 2 ; SRAM variable c .org 0x2000 d .space 2 ; SRAM variable d e .space 4 ; ...I must insert an external SRAM in my design based on AT91SAM9263 using the EBI0. Does anyone know a SRAM model (at least 1Mx16) which is known to work with this package? ThanksDear all, Here i have some doubt please help me. I am interfacing 1Mb SRAM to LM3S3748 processor using SPI protocol. For this i used 4 GPIO pin and configured as SPI protocol. I can able to write and read data from memory location of SRAM separately. My doubt is that in LM3S3748 limited in built RAM is there so i cant store all my ...Hello, I have a question about STM32F207 : Is it possible to connect an external SRAM + an external NAND flash on the same microcontroller through the FSMC controller ? What is the effect in this case in term of performances ? Thank you in advance for your response. ThomasI'm using the Keil MCBSTM32F400 development board and I'd like to start using the external SRAM. From the user's guide the SRAM uses the following pins and is at the following location: SRAM FSMC_NE3 / PG10 0x68000000 - 0x681FFFFF I'm having trouble accessing the memory. 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